Abstract: TMS320DM642 is selected as the system CPU, and the latest video coding standard H.264 compression algorithm is used to implement a wireless video surveillance and video data storage system based on CDMA network transmission. The paper describes the system composition, structure and function in detail, and analyzes and designs each component module of the system in detail, including video and audio input, CDMA transmission serial port, DE and USB communication modules, and analyzes the system for DM642 high-speed CPU Problems that should be paid attention to in the design.
Keywords: TMS320DM642; embedded system; video surveillance; CDMA
Wireless video surveillance system is an important equipment for public security, transportation, water conservancy and other industries. At present, wireless video transmission equipment mainly uses the microwave method. Its fatal weakness is the short transmission distance. The transmission distance is greatly reduced when there are obstacles. Good solution. With the introduction of GRPS and CDMA1x public wireless data networks by operators in most parts of the country, the transmission of video over public wireless data networks has become a hotspot of research and application today. It can completely solve the short-distance problem of microwave mode. Because the bandwidth of public wireless data networks is relatively narrow and unstable, video compression algorithms with low coding efficiency (such as H.263, MPEG-4, etc.) are used, and the transmission effect is not ideal, which cannot meet the requirements of most monitoring occasions. H.264 is the latest video compression standard developed by JVT, which is 50% lower than H.263 and MPEG-4 at the same quality, and supports wireless network transmission, but its calculation complexity is also H.263 and MPEG-4 3-5 times, so the general CPU system can not meet the requirements. TMS320DM642 is TI's latest high-performance digital media processor with instructions up to 4800MIPS, which can meet the requirements of real-time H.264 encoding algorithm. This paper designs an embedded system based on TMS320DM642, adopts H.264 video coding algorithm, and successfully develops a wireless video surveillance system based on CDMA transmission.
1 Composition of wireless video surveillance system
1. 1 Design requirements of wireless video surveillance system
This system requires an embedded video sending terminal to compress the captured video image in real time and send it through the CDMA network. The receiving end uses a PC to decode and display the received video data. There are the following requirements for embedded video sending terminals:
①One PAL / NTSC standard analog video input and one analog audio input; ②Send video data through the network using CDMA access; ③Use CF card or hard disk to store video locally; ④Send and save the size and frame of the image Parameters such as rate can be adjusted; ⑤ Remote control can be performed through wireless network, and low power consumption is required.
1. 2 overall design of the system
Due to the narrow bandwidth of the CDMA wireless network and large fluctuations in bandwidth, H.264 is used as the video compression algorithm in the system. At the same time, the local storage and the CDMA transmission video are different in image size and frame rate, and two coding structures need to be used for coding. Figure 1 shows the overall structural block diagram of the system. The system mainly includes DM642CPU, video input, audio input / output, hard disk interface, serial port and USB communication (USB2.0) and other main functional modules, and also includes real-time clock (RTC) , Display and I / O interface (LCD & I / O), SDRAM, FLASH and power (POWER) module. The following will analyze and design each functional module in detail.
Figure 1 System block diagram of video sending terminal
2 Hardware design of wireless video surveillance system
2. 1 Introduction to TMS320DM642
TMS320DM642 is a high-performance digital media processor launched by TI for multimedia processing applications. The processor is specially tailored for the video and imaging market, and is particularly suitable for VOIP video, video on demand (VOD), multi-channel digital video camera recording applications, and high-quality video encoding and decoding solutions. The DM642 processor internally integrates the TMS320C64X DSP core. At 600MHz operating speed, the instructions can reach 4800MIPS. Due to its powerful computing power, it can implement real-time H.264 encoding and decoding algorithms.
DM642 integrates an external memory interface (EMIF) control unit, which can be directly connected to external SDRAM and FLASH through 20 address lines and a 64-bit data bus. Since 100MHz SDRAM is used in this system, considering the signal integrity, SDRAM is directly connected to DM642, and FLA SH is driven and connected through the bus.
2. 2 video input module
DM642 has three video ports, supporting multiple resolutions and standards, such as CCIR601, ITU-BT. 656, BT. 1120, etc. Each port is 20bit wide and can be flexibly configured as a 20 / 16bit or two 10 / 8bit channel. At the same time, each port can be configured as video input or video output. In this system, VP0 is connected to SAA7113H for video input acquisition.
SAA7113H is a 9-bit video decoder, which has a two-channel analog preprocessing circuit composed of video source selection, anti-aliasing filter and ADC, gain control, clock generation circuit (CGC), multi-standard digital decoder, brightness saturation Control circuit and other components. It supports multiple video input formats such as PAL, NATSC, and the output supports the standard ITU. 656 YUV 4: 2: 2 8bit format, which is controlled by the I2C bus, and only requires a 24. 576MHz external crystal oscillator, using a 3.3V power supply, with Less than 0.5W power consumption. The interface between SAA 7113H and DM642 is shown in Figure 2.
Figure 2 SAA7113H and DM642 interface
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