DS90C187: Tablet High Definition Display Solution

TI's DS90C187 is a low-power parallel-to-serial converter (serializer) that is primarily used in battery-powered handheld devices to reduce the size of the RGB interface between the main GPU and the display. The device supports up to QXGA 2048 x 1536@60Hz resolution and dual pixel data transfer between the host and flat panel display. It consumes 100mW at 185MHz and can drive QXGA/WQXGA displays. It supports 24-bit RGB and 48-bit RGB. It has three modes of operation: single pixel in/one pixel out (SISO), single pixel in/out of pixel out (SIDO). And dual pixel in / double pixel out (DIDO).

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TI's DS90C187 is a low-power parallel-to-serial converter (serializer) that is primarily used in battery-powered handheld devices to reduce the size of the RGB interface between the main GPU and the display.

Figure 1 DS90C187 parallel-to-serial converter block diagram (SISO)

Figure 1 DS90C187 parallel-to-serial converter block diagram (SISO)

The DS90C187 serializer is designed to support dual pixel data transfer between the host and the flat panel display up to QXGA 2048 x 1536@ 60Hz. The transmitter can convert up to 48-bit (two-pixel 24-bit color) 1.8V LVCMOS data into two channels, each of which is a 4-data+clock (4D+) fold-width interface LVDS-compatible data stream.

The DS90C187 supports three modes of operation. In single-pixel input/output mode, the device can drive up to SXGA+1400×1050@ 60Hz. In this mode, the device converts a bank's 24-bit RGB data into a channel's 4D+ C LVDS data stream.

In single-pixel input/dual-pixel output mode, the device can drive up to WUXGA+1920×1440@60Hz. In this configuration, the device provides single, dual pixel conversion and converts a bank's 24-bit RGB data into a two-channel 4D+ C LVDS data stream (half-pixel clock rate). In dual-pixel input/dual-pixel output mode, the device can drive up to 2048×1536@ 60Hz or QSXGA2560×2048@30Hz of QXGA. In this mode, the device converts 2-channel 24-bit RGB data into a 2-channel 4D+ C LVDS data stream. In all modes, the device supports 18bpp and 24bpp colors.

The DS90C187 is available in a small 92-pin dual-row QFN package with a single 1.8V supply to minimize power consumption.

DS90C187 main features

• Typical power consumption at 100mW at 185MHz (SIDO mode)

• Drive QXGA/WQXGA class display

Figure 2 DS90C187 parallel-to-serial converter block diagram (SIDO)

Figure 2 DS90C187 parallel-to-serial converter block diagram (SIDO)

Figure 3 DS90C187 parallel-to-serial converter block diagram (DIDO)

Figure 3 DS90C187 parallel-to-serial converter block diagram (DIDO)

• Three modes of operation

– single pixel input, output (SISO), maximum 105MHz

– Single pixel input / dual pixel output (SIDO), 185MHz

– Dual pixel input / dual pixel output (DIDO), 105MHz

• Support 24-bit RGB, 48-bit RGB

• Optional low power mode, support for 18-bit RGB, 36-bit RGB

• Support 3D, 4D+, 6D+, 6D+2, 8D+, 8D+2 C LVDS configurations

• Linked to FPD, compatible with FlatLink Deserializer

• 1.8V VDDIO, and nuclear power

• Interface directly connected to 1.8V LVCMOS

• Less than 1mW in sleep mode

• Spread spectrum clock compatible

• Small 7mm × 7mm × 0.9mm, 92 pins

Double row QFN package

DS90C187 application

• Media tablet device

• eBook / Laptop

• Portable display

C187EVK01 evaluation module

Texas Instruments' C187EVK01 Evaluation Module (EVM) helps designers evaluate the performance of the DS90C187 low-power 1.8V dual-pixel FPD-Link (LVDS) serializer. The device operates from a single 1.8V supply and supports pixel clocks from 50MHz to 185MHz (single-in, dual-out) or 25MHz to 105MHz (single/double in/single out) inputs.

Main features of the C187EVK01 evaluation module

• 185MHz, 100 mW typical power consumption (SIDO mode)

• Drive QXGA/WQXGA level display

Figure 4 C187EVK01 evaluation module (EVM) circuit diagram (1)

Figure 4 C187EVK01 evaluation module (EVM) circuit diagram (1)

• Three modes of operation:

– single pixel input, single pixel output (SISO), up to 105MHz

– Single pixel input / dual pixel output (SIDO), 185MHz

– Dual pixel in / dual pixel out (DIDO), 105MHz

• Support 24-bit RGB, 48-bit RGB

• Optional low power mode, support for 18-bit RGB, 36-bit RGB

• Support 3D+, 4D+, 6D+, 6D+2, 8D+, 8D+2 C LVDS configurations

• Compatible with FPD links, FlatLink serializers

• 1.8V VDDIO, and nuclear power supply

• Power consumption in sleep mode is less than 1mW

• Spread spectrum clock compatible

• 7mm × 7mm × 0.9mm, 92-pin dual-row QFN package

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