Adopting FPGA speech recognition system circuit design

Car Audio Crystal 3.2*2.5mm 3225 24M (24.000MHZ) 20PF 10PPM 20PPM 30PPM

Factory direct sales - SMD aluminum electrolytic capacitor - straight plug solid capacitors, the products are imported from Japan, aluminum foil,

In recent years, most of speech recognition research has focused on algorithm design and improvement. With the rapid development of semiconductor technology, the scale of integrated circuits has been increasing and the level of various R&D technologies has been continuously improved, and new hardware platforms have been introduced. The speech recognition implementation platform has more options. After combining with DSP, FPGA, ASIC and other embedded systems, the speech recognition technology has gradually developed into a practical and miniaturized direction. Based on the research of various speech feature parameters and isolated speech recognition models, this paper focuses on the application of DTW model based on dynamic time warping algorithm in the field of isolated speech speech recognition, and combined with FPGA-based SOPC system. An isolated speech recognition system with better accuracy and speed is implemented on the embedded platform.

24-bit audio codec design

The DE2 board provides a high quality 24-bit Wolfson WM8731 audio codec chip. The chip supports microphone input, line-in, and line out of three ports, which can adjust the sampling frequency from 8KHZ to 96KHZ. The chip development board manufacturer has fixed the serial I2C bus protocol to transfer data, and the corresponding port has been fixed in the Cyclone II 2C35 FPGA. Figure 19 shows the circuit schematic.

The hardware connection of the system is fixed. The design only needs to set the control word for the working mode of the chip, and the program can be written according to the timing chart of the chip. The data source of the system is collected from this circuit, so you must be familiar with the use of WM8731 for this part of the acquisition. The specific implementation of the system acquisition will be described in detail in Chapter 5.

LCD liquid crystal display module

Most of the information exchanged by the human-machine is completed through the prompt information of the liquid crystal. This module uses the character display module CFAH1702B-TMC-JP, which is a 2-line, 16-character display, 5V power supply, 8-bit register control word, including instruction register (IR) and data register (DR). There are 8-bit data buses D0-D7, and RS, R/W, EN three control ports, with character contrast adjustment and backlight, through the character library memory to find the corresponding number or English characters. The figure below is the schematic of the LCD on the DE2 board.

The overall design of the system is based on the DE2 development platform and uses the SOPC technology based on Nios II. The advantage of adopting this solution is that the system on chip is implemented, which reduces the physical volume and overall power consumption of the system. At the same time, the system control core is implemented inside the FPGA, which can update and upgrade the system very conveniently, greatly improving the general system. Sex and maintainability. In addition, because the system requires a large number of high-speed data operations, the author makes full use of the rich hardware multiplier of Cyclone II chip in the design, realizes the endpoint detection module of speech signal, FFT fast Fourier transform module, DCT discrete cosine transform module, etc. Hardware design module. In order to improve the overall performance of the system, the author makes full use of the high-speed parallel advantages of FPGA, and the Avalon bus custom hardware peripherals in the supporting development environment, so that the system's ability to process digital signals is greatly improved, and its performance is superior to traditional micro-control. And ordinary DSP chips.